SystemVerilog IDE¶
SystemVerilog IDE is the documentation surface for editor diagnostics, validation context, declaration navigation, and proposal-only workflow records around PCCX systems.
This site is intentionally static. It describes the lab surface and its data contracts; it does not invoke local tools, execute hardware flows, start model sessions, or call providers.
Project Routes¶
PCCX documentation
Main architecture, versioned PCCX docs, and public evidence boundaries.
PCCX Lab
Verification lab docs for traces, reports, diagnostics, and workflow boundaries.
PCCX Launcher
Launcher contract and runtime-readiness documentation.
SystemVerilog IDE
Editor diagnostics, validation context, and proposal-surface docs.